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Gali Zohar Gonen posted a job: EZchip Israel - Kiryat Gat or Yokneam is looking for 3 new experts - Backend, DFT & Technology Expert. Please send relevant cv's to my mail galiz@ezchip.com "Position 1 - Technical Lead BackEnd Engineer Location: Kiryat Gat, Israel Description: RTL2GDSII for state-of-the-art network processors. Qualifications: • B.Sc. in Electronic Engineering from a leading technical university – graduated with honored • 5-8 years relevant work experience including: o Technical leadership for full flow RTL2GDSII focused on TSMC backend flow on large chips including high speed interfaces. o Deep understanding and “hands on” of backend tools (Synopsys backend is advantage). o Proven experience for 40nm/28nm technology o Proven experience for: Synthesis ; Constraint ; Equivalent checking ; Floor Planning ; Timing budgeting ; clock tree ; STA; P & R ; Noise Analysis ; Power Grid ; Power Analysis • Advantage: o package design ; o Working with package house o Working with ASIC Vendors • Personal skills required: o Ability to work in a dynamic environment o Ability to work in a team o Quick learner Position 2: Technical Lead DFT Engineer Location: Kiryat Gat, Israel Description: Test suit for state-of-the-art network processors. Qualifications: • B.Sc. in Electronic Engineering from a leading technical university – graduated with honored • 5-8 years relevant work experience including: o Technical leadership for full DFT flow. o Deep understanding and “hands on” of DFT tools (Synopsys is advantage). o Proven experience for 40nm technology o Proven experience for: DC Scan ; AC Scan ; Scan compression ; ATPG; Jtag ; Design for test ;Mem BIST; IO Bist ; Test IP • Advantage: o GLV Simulation with SDF o Test program development o Debug Silicon failures • Personal skills required: o Ability to work in a dynamic environment o Ability to work in a team o Quick learner Position 3: Deep Submicron Technology Expert Location: Kiryat Gat, Israel Description: Deep Submicron technology expert for state-of-the-art network processors. Qualifications: • B.Sc. in Electronic Engineering from a leading technical university – graduated with honored • 10+ years relevant work experience including: o Deep understanding in process variation o Deep understanding in transistor level models o Leakage and dynamic power simulation o Process variation modeling o Spice simulations for complex circuitry – ESD ; Clock tree ; noise ; IOs o Be involved in all design stages from definition RTL to final layout signoff o Proven experience for 40nm/28nm technology o Proven experience with high speed interfaces integration (DDR 2/3 ; 10G SERDES) • Advantage: o Experience in package development o Experience with Analog IP development • Personal skills required: o Ability to work in a dynamic environment o Ability to work in a team o Quick learner" |
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